Gupito, Sigid (2003) Perancangan pencacah naik turun berbasis FPGA : designing up down counter using FPGA. Skripsi thesis, Sanata Dharma University.
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Item Type: | Thesis (Skripsi) |
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Subjects: | T Technology > TK Electrical engineering. Electronics Nuclear engineering |
Divisions: | Faculty of Science and Technology > Department of Electrical Engineering |
Depositing User: | Y. Etik Supriyanti |
Date Deposited: | 04 Jul 2018 06:40 |
Last Modified: | 04 Jul 2018 06:40 |
URI: | http://repository.usd.ac.id/id/eprint/29717 |
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