Pardede, Sihar Ramli Josef (2003) Implementation of phase locked loop using descrete component : [realisasi rangkaian pengunci fasa [PLL] menggunakan komponen diskrit]. Skripsi thesis, Sanata Dharma University.
|
Text (Abstract)
955114064.pdf Download (19kB) | Preview |
|
|
Text (Full)
955114064_Full.pdf Restricted to Registered users only Download (883kB) |
| Item Type: | Thesis (Skripsi) |
|---|---|
| Subjects: | T Technology > TK Electrical engineering. Electronics Nuclear engineering |
| Divisions: | Faculty of Science and Technology > Department of Electrical Engineering |
| Depositing User: | Y. Etik Supriyanti |
| Date Deposited: | 11 Jul 2018 04:28 |
| Last Modified: | 11 Jul 2018 04:28 |
| URI: | http://repository.usd.ac.id/id/eprint/30265 |
Actions (login required)
![]() |
View Item |
